Toronto-founded Tenstorrent said on 19 October that it had raised $1.5 billion in a Series E round, putting its post-money valuation at $6.2 billion. Trace Capital and Innovation X led the round. The company named Sandisk, Fidelity Management & Research Company, T. Rowe Price and Tether Investments among the other participants.
Tenstorrent plans to use the funding to deploy Galaxy servers at greater scale and advance the AI and CPU intellectual property it licenses to customers designing their own silicon. The company develops RISC-V-based processors and systems and licenses CPU and AI cores to chip designers including Samsung and LG. The announcement confirms the financing and intended uses; it does not specify when or by how much manufacturing capacity will increase.
HABER PAPER / DATA
Behind the numbers
Inspect the source, read the data, make your own analysis.
Indicators
Tenstorrent raises $1.5 billion at a $6.2 billion valuation
The Canadian AI-chip company says it will use the new funding to scale Galaxy servers and advance processor technology it licenses to customers.
Series E financing amount
1,500 million USDAnnouncement date: 2026-10-19 · Observed
Post-money valuation
6,200 million USDAnnouncement date: 2026-10-19 · Observed
Source and methodology
Haber Paper source-linked editorial data compilation; underlying sources retain their separate reuse terms.
US-dollar amounts reported by Tenstorrent for a closed funding round. Source billion-dollar amounts are expressed in million dollars with an exact 1,000 factor. Funding and company valuation are distinct and not additive. Date is the announcement day.
At the BUILD 2026 conference, the communications minister cited power, connectivity, cloud access and advanced chips as constraints on local AI growth.
Source: Voice of Nigeria, reporting the Ministry of Communications, Innovation and Digital Economy
Researchers from Ottawa, Columbia and Hanyang reviewed post-CMOS materials and device approaches for artificial neurons; the work is a literature review, not a new chip prototype.
A preprint describes an analog memory architecture that stores multiple high-dimensional vectors in superposed form, aiming to reduce the number of memory cells needed for neural-network weights and embeddings. The authors say they demonstrate vector storage and retrieval.
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